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S.No: Project title
1 Asynchronous fifo controller
ALU (32 operations)
32 bit Parallel CRC
Real Time Clock
Low power cache
A simple DMA controller
I2C communications protocol
SPI communications protocol
Frame assembler and transmitter of Ethernet transmitter
10  Defer and backoff blocks of Ethernet transmitter.
11  Multiple scheme arbiter.
12  Key expansion in AES
13  Byte substitution in AES
14  Mix column in AES
15  AES encryption.
16  AES decryption.
17  Uart transmitter
18  Uart Receiver
19  IEEE 754-2008 floating point multiplier
20  Design of N*N matrix multiplication
21  Design of Manchester encoder and decoder
22 Implementation of DCT using Verilog HDL
23 VLSI Design of DES (Data Encryption Standard) Algorithm
24 Vending machine
25  Reconfigurable barrel shifter
26  Baud rate generator
27  Use of timers in Traffic light controller
28  8 bit microprocessor
29  RSA encryption algorithm
30  MD5 based data integrity system.
31  Booths multiplier
32  Efficient on-chip Cross talk avoidance codec design
33  Energy efficient spatial coding technique for low power applications
34 Montgomery multipliers.
35  Command generator for DDR controller
36  Scheduler for DDR controller.
37  Low power LFSR based pattern generator for BIST
38  MISR based TRA for BIST
39  Multiple scheme arbiter.
40  FPGA implementation of low power parallel multiplier
41  Design of N*N matrix multiplication
42  Cost efficient SHA hardware accelerators
43  Binary to seven segment decoder for multiplexed display
44  DDR memory model implementation
45  March C+ algorithm (with and without BDS) for MBIST
46  Design of Content addressable memory.
47  Fully configurable timer/counter for use in microcontroller.
48  Vending machine
49  Binary to bcd and bcd to binary converter
50  Floating point ALU

VHDL simulation projects

51 VHDL implementation of FIR filter structures
52 Design and Implementation of Asynchronous FIFO for  Embedded application 
53 VHDL Implementation of I2C bus Controller    
54 VHDL Implementation of Golay Encoder & Decoder  - 
55 CORDIC algorithm for trigonometric function computation in VHDL.    
56 VHDL implementation of efficient source coding technique
57 Simulation of digital down converter (DDC) in VHDL
58 Network intrusion detection
59 VHDL simulation of multi path fading model for broadband wireless networks
60 VHDL simulation and synthesis of Xilinx FFT IP core for streaming type of signal processing

VHDL simulation and FPGA kit based projects

61 FPGA  Implementation of UART Controller
62 FPGA implementation of VGA interface controller
63 FPGA implementation of DPWM generation circuit
64 Implementation of stepper motor controller with FPGA.
65 Implementation of PS/2 Key board interface with FPGA.
66 Implementation of low cost logic signal analyzer (LSA) on Spartan-3 FPGA.
67 Study and FPGA implementation of fixed point adders and multipliers structures    
68 FPGA implementation of digital BFSK transmitter and receiver    
69 FPGA Implementation of 32-Bit Arithmetic Logic Unit(ALU) for ARM7 soft processor   
70 FPGA  implementation of Distributed Arithmetic based MAC unit 
71 FPGA Implementation of Cyclic Redundancy Check (CRC) generator -
72 Look up table based digital frequency synthesis for FPGA based applications –
73 Study and FPGA implementation various PN sequence generators for CDMA communication applications.
74 FPGA implementation of encryption algorithm for internet applications.
75 Porting Pico blaze 8 bit soft microcontroller on Spartan 3E FPGA for CSOC applications
76 Porting Micro blaze 32 bit soft processor on Spartan 3E FPGA using hardware software codesign approach
77 Implementing fast dual port RAM using block RAMs on Spartan FPGAs
78 Realizing efficient multi clock domain circuits with digital clock managers (DCMs) of Spartan 3E FPGAs
79 FPGA realization of Manchester encoder and decoder
80 Implementing FIR digital filter for FPGA based DSP applications
81 Implementing Cascade Integer Comb applications for software defined radio applications
82 Realizing run time configurable FFT core using Xilinx modules on Spartan FPGA
83 Magnitude computation of complex numbers using area efficient CORDIC algorithm
84 FPGA implementation of Programmable and reconfigurable timer module for SOC applications
85 Microwave oven controller built with low cost FPGAs
86 Simulation, synthesis and FPGA verification of ALU for RISC processor for embedded soft-core applications
87 Implementation of S-box (Kernel of AES algorithm) for real time on chip cryptography
88 Implementation of SHA function for FPGA based cryptographic applications
89 FPGA implementation of Programmable interrupt controller using VHDL
90 Implementation of hardware Watchdog timer in Xilinx Spartan FPGA
91 Implementation of real time on chip trace data compression and decompression algorithm

We will be providing the following details on CD:

  1. Abstract
  2. Datasheets
  3. Project report in PDF format and in doc (word) format
  4. Circuit diagram
  5. PCB layout
  6. Microcontroller program (software code)
  7. Sample power point presentation.
  8. Hex file of the microcontroller code
  9. Datasheets of all the components / ICs used in the project
  10. Photos & video file on entire project

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